Smelt — an open source test runner for chip developers
Hey everyone, James from Silogy here. We’re excited to open-source our test runner, Smelt. Smelt is a simple and extensible test runner optimized for chip development workflows. Smelt enables developers to: * Programmatically define numerous test variants * Execute these tests in parallel * Easily analyze test results As chip designs get more complex, the state space that needs to be explored in design verification is exploding. In chip development, it's common to run thousands of tests, each with multiple hyperparameters that result in even more variation. Smelt offers a straightforward…
In plain words
Smelt is an open-source test runner designed for chip developers to manage complex verification workflows. It allows developers to programmatically generate numerous test variants, execute them in parallel, and analyze results efficiently. The tool integrates with popular simulators and chip design tools, helping teams handle the expanding state space required for modern chip design verification.
written from the facts on this page · September 2026
From the sources
In the maker’s words, at launch
Hey everyone, James from Silogy here. We’re excited to open-source our test runner, Smelt. Smelt is a simple and extensible test runner optimized for chip development workflows. Smelt enables developers to: * Programmatically define numerous test variants * Execute these tests in parallel * Easily analyze test results As chip designs get more complex, the state space that needs to be explored in design verification is exploding. In chip development, it's common to run thousands of tests, each with multiple hyperparameters that result in even more variation. Smelt offers a straightforward approach to generating test variants and extracting valuable insights from your test runs. Smelt integrates seamlessly with most popular simulators and other chip design tools. Key features: * Procedural test generation: Programmatically generate tests with python * Automatic rerun on failure: Describe the computation required re-run failing tests * Analysis APIs: All of the data needed to track and reproduce tests * Extensible: Define your tests with a simple python interface Yves (https://github.com/silogy-io/yves) is a suite of directed performance tests that we brought up with smelt – check it out if you’d like to see smelt in action. Repo: https://github.com/silogy-io/smelt We built Smelt to streamline the testing process for chip developers. We're eager to hear your feedback and see how it performs in your projects!
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