A 16-bit Forth machine written in VHDL

In plain words

YAFC is a 16-bit Forth processor implemented in VHDL, a hardware description language used to design digital circuits. It provides a complete Forth computing core that can be synthesized onto programmable hardware. The project is designed for developers and hardware engineers interested in Forth language implementations or embedded systems. The source code is available on GitHub for collaboration and contribution.

written from the facts on this page · September 2026

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