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Dev tools · alternatives · 2026

24 alternatives to A 16-bit Forth machine written in VHDL

Yet Another Forth Core... Contribute to inforichland/yafc development by creating an account on GitHub.

YAFC is a 16-bit Forth processor implemented in VHDL, a hardware description language used to design digital circuits. It provides a complete Forth computing core that can be synthesized onto programmable hardware. The… Below are 24 products that do a similar job, ranked by how close each is in meaning and then by launch-day votes. A 16-bit Forth machine written in VHDL launched in 2014; newer entries below may have overtaken it.

  1. 1

    A Forth CPU and System on a Chip, based on the J1, written in VHDL - howerj/forth-cpu

    2019 · github.com · its alternatives →

  2. 2H1

    This is a 16bit CPU+Minicomputer from pure 74 series logic. It has user/kernel modes, virtual memory, prioritized IRQ's and DMA. It has a full C compiler and a unix-like OS. It's still in development.

    2023 · sol-1.org · its alternatives →

  3. 3

    Hello! I'm Byran. I spent the past ~6 months engineering a laptop from scratch. It's fully open-source on GH at: https://github.com/Hello9999901/laptop

    2025 · byran.ee · its alternatives →

  4. 4

    "interesting" VM in C. Let's see how this goes. Contribute to tekknolagi/carp development by creating an account on GitHub.

    2014 · github.com · its alternatives →

  5. 5

    A bit-serial CPU written in VHDL, with a simulator written in C. - howerj/bit-serial

    2020 · github.com · its alternatives →

  6. 6

    Run KolibriOS, Linux or Windows 98 in your browser

    2013 · copy.sh · its alternatives →

  7. 7

    A complete compiler for a simple language (in less than 150 LoC) - 00_readme.md

    2022 · gist.github.com · its alternatives →

  8. 8

    32-bit RISC-V CPU in ~800 lines of C89. Contribute to mnurzia/rv development by creating an account on GitHub.

    2023 · github.com · its alternatives →

  9. 9

    Hi! me and my friends together built an 8 bit CPU implemented in Logisim purely from scratch. The control unit of this system does not implement the generic microcode ROM or any kind of RAM. This was made purely from discrete logic gates and coded the system to run different programs. key features: Custom 16-instruction Harvard ISA, 8-bit fixed format, 4 general purpose registers Hardwired control unit built entirely from AND/OR gate logic matrix Dual-phase clocking to eliminate race conditions Bootstrap Control Unit that cold-boots via ROM-to-RAM transfer Early-exit conditional…

    Jun 2026 · github.com · its alternatives →

  10. 10

    Bootstrapping a Forth interpreter from hand-written tiny ELF binary. Just for fun. - GitHub - nineties/planckforth: Bootstrapping a Forth interpreter from hand-written tiny ELF binary. Just for fun.

    2021 · github.com · its alternatives →

  11. 11

    CHIP-8 console on FPGA. Contribute to pwmarcz/fpga-chip8 development by creating an account on GitHub.

    2018 · github.com · its alternatives →

  12. 12

    A pipelined RISCV implementation in VHDL. Contribute to inforichland/freezing-spice development by creating an account on GitHub.

    2015 · github.com · its alternatives →

  13. 13

    A digital logic simulation written in C. Contribute to rzscheck/logic development by creating an account on GitHub.

    2020 · github.com · its alternatives →

  14. 14

    Hi HN, I’m Dvir, a young developer. Last year, I got rejected after a job interview because I lacked some CPU knowledge. After that, I decided to deepen my understanding in the low level world and learn how things work under the hood. I decided to try and create an OS in C and ASM as a way to broaden my knowledge in this area. This took me on the most interesting ride, where I’ve learned about OS theory and low level programming on a whole new level. I’ve spent hours upon hours, blood and tears, reading different OS theory blogs, learning low level concepts, debugging, testing and working on…

    Oct 2025 · github.com · its alternatives →

  15. 15

    simple virtual machine and assembler. Contribute to ronsoros/rvm development by creating an account on GitHub.

    2016 · github.com · its alternatives →

  16. 16

    A multitasking monolithic Kernel based x86 targeting Operating System written in C# from scratch aiming for high-level implementation of drivers in managed environment. - amaneureka/AtomOS

    2017 · github.com · its alternatives →

  17. 17

    RISC-V's compressed instruction (RVC) extension is intended as an add-on to the regular, 32-bit instruction set, not a replacement or competitor. Its designers intended RVC instructions to be expanded into regular 32-bit RV32I equivalents via a pre-decoder. What happens if we explicitly architect a RISC-V CPU to execute RVC instructions, and "mop up" any RV32I instructions that aren't convenient via a microcode layer? What architectural optimizations are unlocked as a result? "Minimax" is an experimental RISC-V implementation intended to establish if an RVC-optimized CPU is, in practice, any…

    2022 · github.com · its alternatives →

  18. 18

    Github: https://github.com/errorcodezero/turbine

    2025 · errorcodezero.dev · its alternatives →

  19. 19

    Programming language that compiles into a x86 ELF executable. - riicchhaarrd/ocean

    2021 · github.com · its alternatives →

  20. 20IM

    https://github.com/siraben/ti84-forth Hi HN! For the past year I've been getting into programming in Z80 assembly (especially for the TI-84+). More recently I've been learning about the Forth programming language and after a lot of searching online (in vain) for a Forth interpreter for the TI-84, I decided to write one myself. It's been fun demoing this to others, because it's a very unexpected use of a calculator. It's my largest project to date, and I'm interested to know what the HN community thinks, please feel free to critique my code! -- Ben

    2018 · its alternatives →

  21. 21

    I built a new 8-bit CPU in VHDL from scratch (starting from the ISA). I felt that most educational soft-cores hide too much behind abstraction, eg. if I can do a+b with a single assignment that calls an optimized arithmetic library, then why did I learn the ripple carry adder in the first place ? And why did I learn flip flops if I can do all my control logic with a simple PROCESS statement like I would with a programming language ? Of course abstraction is the main selling point of HDLs, but would it work if I tried to keep strictly structural and rely on ieee.std_logic_1164 only ? Well, it…

    Jan 2026 · github.com · its alternatives →

  22. 22

    Go compiler for small places. Microcontrollers, WebAssembly (WASM/WASI), and command-line tools. Based on LLVM. - tinygo-org/tinygo

    2018 · github.com · its alternatives →

  23. 23AR

    2021 · guillaume.baierouge.fr · its alternatives →

  24. 24

    A tiny, embeddable language implemented in ANSI C. Contribute to rxi/fe development by creating an account on GitHub.

    2020 · github.com · its alternatives →

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Ranked by how close each launch is in meaning, then by votes. Prices were read from each product’s own site when checked and can change. Refine with your own description →