Life & fun · alternatives · 2026

24 alternatives to Minimax – A Compressed-First, Microcoded RISC-V CPU

RISC-V's compressed instruction (RVC) extension is intended as an add-on to the regular, 32-bit instruction set, not a replacement or competitor. Its designers intended RVC instructions to be expanded into regular 32-bit RV32I equivalents via a pre-decoder. What happens if we explicitly architect a RISC-V CPU to execute RVC instructions, and "mop up" any RV32I instructions that aren't convenient via a microcode layer? What architectural optimizations are unlocked as a result? "Minimax" is an experimental RISC-V implementation intended to establish if an RVC-optimized CPU is, in practice, any…

Minimax is an experimental RISC-V CPU implementation that prioritizes the compressed instruction set (RVC) as its primary execution format rather than treating it as an add-on. Instead of pre-decoding RVC instructions… Below are 24 products that do a similar job, ranked by how close each is in meaning and then by launch-day votes. Minimax – A Compressed-First, Microcoded RISC-V CPU launched in 2022; newer entries below may have overtaken it.

1
RISC-V core written in 600 lines of C89▲190
32-bit RISC-V CPU in ~800 lines of C89. Contribute to mnurzia/rv development by creating an account on GitHub.
2023 · github.com · its alternatives →
2AR
A RISC-V core in Racket▲122
2021 · guillaume.baierouge.fr · its alternatives →
3
IDE for Learning RISC-V▲105
RARS -- RISC-V Assembler and Runtime Simulator. Contribute to TheThirdOne/rars development by creating an account on GitHub.
2019 · github.com · its alternatives →
4
MiniPCs.zip – Charting the Pareto frontier of Mini PCs▲115
The overall idea is to chart out the thousands of Mini PCs by benchmark and reveal the Pareto Front so you can get the most Compute per Dollar. Definitely a labor of love as I have a number of Mini PCs for my "homelab" (TrueNAS, piHole, Plex, basic stuff). It uses Gemini to extract specs from listings (since they're not often strongly categorized). Quick blog post here: https://luke.zip/posts/pareto-pcs/
Jun 2026 · minipcs.zip · its alternatives →
5
A pipelined RISC-V processor written in VHDL▲65
A pipelined RISCV implementation in VHDL. Contribute to inforichland/freezing-spice development by creating an account on GitHub.
2015 · github.com · its alternatives →
6
RISC-V assembly tabletop board game (hack your opponent)▲400
I made this game to teach my daughter how buffer overflows work. I want her to look at programs as things she can change, and make them do whatever she wants. Building your exploit in memory and jumping to it feels so cool. I hope this game teaches kids and programmers (who seem to have forgotten what computers actually are) that its quite fun to mess with programs. We used to have that excitement few years ago, just break into softice and change a branch into a nop and ignore the serial number check, or go to a different game level because this one is too annoying. While working on the game…
2023 · punkx.org · its alternatives →
7
MiniMax H3▲333
MiniMax H3 is a multimodal AI video generator that turns text, images, video clips, and audio into coherent cinematic videos with native stereo sound. It lets you mix up to 12 references in one pass, maintain character and style consistency, and perform precise instruction-based
Jul 2026 · minimax.io · its alternatives →
8
RISC-V disassembler in 200 lines of C▲29
A minimal RISC-V RV32I disassembler. Contribute to andportnoy/riscv-disassembler development by creating an account on GitHub.
2020 · github.com · its alternatives →
9
C++17 RISC-V RV32GC / RV64GC userspace emulator library▲31
The fastest RVA23 RISC-V sandbox. Contribute to libriscv/libriscv development by creating an account on GitHub.
2020 · github.com · its alternatives →
10
I built a RISC-V emulator that runs DOOM▲50
Demo: https://www.youtube.com/watch?v=f5uygzEmdLw Hi HN, I built a RISC-V emulator that implements the RV32IM instruction set and a minimal syscall interface to run DOOM. A few weeks ago, I got my first output with a simple hello world assembly program. Since then I have been working tirelessly to get DOOM to run. I needed to figure out how to run C programs first, and came across newlib, which allows the underlying environment to implement the syscall stubs one by one until the programs run. I have also added ELF loading, but currently only a single `PT_LOAD` segment is…
May 2026 · github.com · its alternatives →
11
TinyGo – LLVM-based Go compiler for microcontrollers▲177
Go compiler for small places. Microcontrollers, WebAssembly (WASM/WASI), and command-line tools. Based on LLVM. - tinygo-org/tinygo
2018 · github.com · its alternatives →
12
Trieve Vector Inference▲168
Deploy fast, unmetered embedding inference in your own VPC
2024 · its alternatives →
13
Thinc, a new deep learning library by the makers of spaCy and FastAPI▲250
Thinc is a lightweight type-checked deep learning library for composing models, with support for layers defined in frameworks like PyTorch and TensorFlow.
2020 · thinc.ai · its alternatives →
14
Anos – a hand-written ~100KiB microkernel for x86-64 and RISC-V▲115
I pretty much always have a kernel project going on, and have been that way for decades. Over the past couple of years, that's been Anos, which has gotten further along than any of my previous hobby kernels, supporting IPC, multitasking, SMP (x86-64 only right now) and running on real hardware. LLMs (mostly Claude Code) have been used during development, but I learned early on that it's not _great_ at code at this level, so I've restricted its use to mostly documentation and tests. There's _a little_ AI code in the user space, but I have a strict "no AI code" rule in the kernel itself. I…
Apr 2026 · github.com · its alternatives →
15
Tiny-vLLM – high performance LLM inference engine in C++ and CUDA▲205
Build your own high performance LLM inference engine in C++ and CUDA - a smaller version of vLLM - jmaczan/tiny-vllm
May 2026 · github.com · its alternatives →
16
10-40% faster LZMA decoder using x86 CMOVcc▲205
Faster LZMA decoder for x86 CPUs (patch for XZ Utils). - faster_lzma_decoder_x86.patch
2021 · gist.github.com · its alternatives →
17
TinyOS – A minimalist RTOS for Cortex-M written in C▲102
Contribute to cmc-labo/tinyos-rtos development by creating an account on GitHub.
Apr 2026 · github.com · its alternatives →
18
A minimal C runtime for Linux i386 and x86_64 in 87 SLOC of C▲172
A minimal C runtime for Linux i386 & x86_64. Contribute to lpsantil/rt0 development by creating an account on GitHub.
2015 · github.com · its alternatives →
19
RISCY-V02: A 16-bit 2-cycle RISC-V-ish CPU in the 6502 footprint▲7
Finally finished my little CPU project, RISCY-V02. I built it (with Claude) to challenge the notion that the 6502 was a "local optimum" in its transistor budget. Given the constraints of 1970s home computers (~1 MHz DRAM, so raw clock speed doesn't help), could RISC have been a better design choice? This design argues yes: pipelining, barrel shifters, and more registers beat microcode PLAs, questionable addressing modes, and hardware BCD. Highlights: 8x 16-bit general-purpose registers (vs 3x 8-bit on 6502) 2-stage pipeline (Fetch/Execute) with speculative fetch 61 fixed 16-bit…
Mar 2026 · github.com · its alternatives →
20
Libriscv – RISC-V userspace emulator library▲40
The fastest RVA23 RISC-V sandbox. Contribute to libriscv/libriscv development by creating an account on GitHub.
2022 · github.com · its alternatives →
21
MiniCPM-V 4.6▲98
Ultra-efficient 1.3B vision-language model for mobile
May 2026 · github.com · its alternatives →
22H1
Homebrew 16bit CPU from 74HC logic with C compiler and Unix-like OS▲192
This is a 16bit CPU+Minicomputer from pure 74 series logic. It has user/kernel modes, virtual memory, prioritized IRQ's and DMA. It has a full C compiler and a unix-like OS. It's still in development.
2023 · sol-1.org · its alternatives →
23
Bit Serial CPU▲99
A bit-serial CPU written in VHDL, with a simulator written in C. - howerj/bit-serial
2020 · github.com · its alternatives →
24
A (marginally) useful x86-64 ELF executable in 466 bytes▲85
Battery info program for x86-64 Linux laptops in 307 bytes of machine code - meribold/btry
2024 · github.com · its alternatives →

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