Dev tools · alternatives · 2026

24 alternatives to C++17 RISC-V RV32GC / RV64GC userspace emulator library

The fastest RVA23 RISC-V sandbox. Contribute to libriscv/libriscv development by creating an account on GitHub.

This is a userspace emulator library that runs RISC-V RV32GC and RV64GC binaries on other systems. Built with C++17, it allows developers and researchers to execute RISC-V programs without dedicated hardware. The… Below are 24 products that do a similar job, ranked by how close each is in meaning and then by launch-day votes. C++17 RISC-V RV32GC / RV64GC userspace emulator library launched in 2020; newer entries below may have overtaken it.

1
Libriscv – RISC-V userspace emulator library▲40
The fastest RVA23 RISC-V sandbox. Contribute to libriscv/libriscv development by creating an account on GitHub.
2022 · github.com · its alternatives →
2
C++17 RISC-V RV32/64/128 userspace emulator library▲5
The fastest RVA23 RISC-V sandbox. Contribute to libriscv/libriscv development by creating an account on GitHub.
2022 · github.com · its alternatives →
3
RISC-V core written in 600 lines of C89▲190
32-bit RISC-V CPU in ~800 lines of C89. Contribute to mnurzia/rv development by creating an account on GitHub.
2023 · github.com · its alternatives →
4
I built a RISC-V emulator that runs DOOM▲50
Demo: https://www.youtube.com/watch?v=f5uygzEmdLw Hi HN, I built a RISC-V emulator that implements the RV32IM instruction set and a minimal syscall interface to run DOOM. A few weeks ago, I got my first output with a simple hello world assembly program. Since then I have been working tirelessly to get DOOM to run. I needed to figure out how to run C programs first, and came across newlib, which allows the underlying environment to implement the syscall stubs one by one until the programs run. I have also added ELF loading, but currently only a single `PT_LOAD` segment is…
May 2026 · github.com · its alternatives →
5
Minimax – A Compressed-First, Microcoded RISC-V CPU▲171
RISC-V's compressed instruction (RVC) extension is intended as an add-on to the regular, 32-bit instruction set, not a replacement or competitor. Its designers intended RVC instructions to be expanded into regular 32-bit RV32I equivalents via a pre-decoder. What happens if we explicitly architect a RISC-V CPU to execute RVC instructions, and "mop up" any RV32I instructions that aren't convenient via a microcode layer? What architectural optimizations are unlocked as a result? "Minimax" is an experimental RISC-V implementation intended to establish if an RVC-optimized CPU is, in practice, any…
2022 · github.com · its alternatives →
6
A Project Oberon System version running on RISC-V instead of RISC-5▲121
Modified version of the original from http://www.projectoberon.com/ for use with the Oberon IDE - GitHub - rochus-keller/OberonSystem at op2-rv32
Aug 2026 · github.com · its alternatives →
7
v8-riscv — Port of JavaScript V8 engine to RISC-V▲123
Port of Google v8 engine to RISC-V. Contribute to riscv-collab/v8 development by creating an account on GitHub.
2021 · github.com · its alternatives →
8
A straightforward RISC-V 32-bit emulator▲5
A complete Risc-v RV32I emulator in Rust. Contribute to jawline/risc-v-emulator development by creating an account on GitHub.
2024 · github.com · its alternatives →
9
Emacs-riscv – A RISC-V emulator written in Emacs Lisp▲10
Hi HN, This is a small RISC-V emulator I’ve been hacking on in Emacs Lisp as a fun weekend project. It started mostly as a way to better understand the RISC-V spec by implementing things myself, and also as an excuse to write more non-trivial Emacs Lisp. It currently focuses on RV32I and related basics, and is very much not optimized or production-ready. If you’re into RISC-V, emulators, or just enjoy seeing unusual things built in Emacs Lisp, feedback and comments are welcome Happy hacking!
Jan 2026 · github.com · its alternatives →
10
IDE for Learning RISC-V▲105
RARS -- RISC-V Assembler and Runtime Simulator. Contribute to TheThirdOne/rars development by creating an account on GitHub.
2019 · github.com · its alternatives →
11
RISC-V assembly tabletop board game (hack your opponent)▲400
I made this game to teach my daughter how buffer overflows work. I want her to look at programs as things she can change, and make them do whatever she wants. Building your exploit in memory and jumping to it feels so cool. I hope this game teaches kids and programmers (who seem to have forgotten what computers actually are) that its quite fun to mess with programs. We used to have that excitement few years ago, just break into softice and change a branch into a nop and ignore the serial number check, or go to a different game level because this one is too annoying. While working on the game…
2023 · punkx.org · its alternatives →
12
A Fast, Malloc-Free C++14 Json Parser and Encoder▲98
Meta programming utilities for C++14. Merged in matt-42/lithium - matt-42/iod
2014 · github.com · its alternatives →
13
Rust Vector and Quaternion Lib▲128
I use this library I made for Vectors and Quaternions in many personal projects. I've open-sourced it, in case anyone else would get use out of it. I use this on various projects, including quadcopter firmware, a graphics engine, a cosmology simulation, and several molecular dynamics applications. No_std compatible.
2025 · github.com · its alternatives →
14
I integrated my from-scratch TCP/IP stack into the xv6-riscv OS▲147
Hi HN, To truly understand how operating systems and network protocols work, I decided to combine two classic learning tools: the xv6 teaching OS and a from-scratch TCP/IP stack. I'm excited to share the result: my own from-scratch TCP/IP networking stack running directly inside the xv6-riscv (https://github.com/pandax381/xv6-riscv-net) kernel. The project uses a modern virtio-net driver, allowing it to run seamlessly in QEMU and communicate with the host machine. Key features: - From-Scratch Stack: The core is powered by microps…
2025 · github.com · its alternatives →
15
Kakehashi – Experimental userspace to run macOS binaries on Linux ARM▲255
Userspace macOS translation layer for Linux ARM64. Contribute to wie-project/kakehashi development by creating an account on GitHub.
Aug 2026 · github.com · its alternatives →
16
Compile-time HTML parsing in C++14▲175
A C++ HTML template engine that uses compile time HTML parsing - rep-movsd/see-phit
2017 · github.com · its alternatives →
17AR
A RISC-V core in Racket▲122
2021 · guillaume.baierouge.fr · its alternatives →
18
ArcaneVM – A Fully Homomorphic Encryption Brainfuck Virtual Machine▲131
A Fully Homomorphic Encryption Brainfuck virtual machine - f-prime/arcanevm
2019 · github.com · its alternatives →
19
A small virtual machine written in C▲212
"interesting" VM in C. Let's see how this goes. Contribute to tekknolagi/carp development by creating an account on GitHub.
2014 · github.com · its alternatives →
20
RISC-V disassembler in 200 lines of C▲29
A minimal RISC-V RV32I disassembler. Contribute to andportnoy/riscv-disassembler development by creating an account on GitHub.
2020 · github.com · its alternatives →
21
Confidential computing for high-assurance RISC-V embedded systems▲103
Dear HN community! Looking forward to hearing your feedback on ACE (assured confidential execution), technology that implements VM-based trusted execution environment (TEE) for embedded RISC-V systems with focus on a formally verified and auditable firmware. We target high-assurance systems that can benefit from compartmentalization and hardware-backed isolation. The key ingredient called security monitor (firmware) is implemented in Rust. The formal specification is defined as annotations directly in code and gets translated to Coq using RefinedRust automation. ACE design is now part of the…
2025 · github.com · its alternatives →
22
Tiny VM sandbox in C with apps in Rust, C and Zig▲196
Minimalist, dependency-free virtual machine sandbox for microcontrollers and other resource-constrained devices. Single C file, no dynamic memory allocations, asynchronous design, pure C99 - ringtailsoftware/uvm32
Dec 2025 · github.com · its alternatives →
23
A hash array-mapped trie implementation in C▲171
Long-simmering side project that is finally ready to see the light. HAMTs are a cool persistent data structure and implementing one has been a lot of fun. Beyond the code, there is likely some value in the extensive and largely complete implementation docs; basic benchmarks are linked in the README, too. Kind of aiming to be "the libavl for HAMTs". That is obviously a high and aspirational bar but a distinct possibility if it stirs up a little interest and/or contribution. Anyways, it's time for this to go out, collect feedback and maybe even some use outside of toy projects. Let me…
2023 · github.com · its alternatives →
24
Xcc700: Self-hosting mini C compiler for ESP32 (Xtensa) in 700 lines▲154
Repo: https://github.com/valdanylchuk/xcc700 Hi Everyone! I just wrote my first compiler! - single pass, recursive descent, direct emission - generates REL ELF binaries, runnable using ESP-IDF elf_loader - very basic features only, just enough for self-hosting - treats the Xtensa CPU as a stack machine for simplicity, no register allocation / window usage - compilable on Mac, probably also Linux, can cross-compile for esp32 there - wrote for fun / cyberdeck project Sample output from esp32: xcc700.elf xcc700.c -o /d/cc.elf [ xcc700 ] BUILD COMPLETED >…
Dec 2025 · github.com · its alternatives →

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