A Project Oberon System version running on RISC-V instead of RISC-5

In plain words

This is a modified Project Oberon System that runs on RISC-V (RV32) architecture instead of the original RISC-5. The system has been migrated from Oberon 07 to Oberon 90 and uses the OP2 compiler with a RISC-V backend. It includes a virtual machine emulator that replicates Wirth's original Project Oberon machine design, allowing developers to run Oberon code on RISC-V platforms. The repository contains both the system and emulation tools for developers working with Oberon programming.

written from the facts on this page · September 2026

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