Alternatives

Products that do what RISC-V core written in 600 lines of C89 does

1MA
Minimax – A Compressed-First, Microcoded RISC-V CPU▲171
RISC-V's compressed instruction (RVC) extension is intended as an add-on to the regular, 32-bit instruction set, not a replacement or competitor. Its designers intended RVC instructions to be expanded into regular 32-bit RV32I equivalents via a pre-decoder. What happens if we explicitly architect a RISC-V CPU to execute RVC instructions, and "mop up" any RV32I instructions that aren't convenient via a microcode layer? What architectural optimizations are unlocked as a result? "Minimax" is an experimental RISC-V implementation intended to establish if an RVC-optimized CPU is, in practice, any…
2022 · github.com
2AC
A compiler and VM for a simple language, in 150 lines of code▲200
2022 · gist.github.com
3AP
A pipelined RISC-V processor written in VHDL▲65
2015 · github.com
4RV
RISC-V disassembler in 200 lines of C▲29
2020 · github.com
5AR
A RISC-V core in Racket▲122
2021 · guillaume.baierouge.fr
6AD
Atopile – Design circuit boards with code▲595
Hey HN! We are the founders of atopile. We’re building a tool to describe electronics with code. Here is a quick demo: https://youtu.be/7-Q0XVpfW3Y Could you imagine the pain of building an entire software product using only assembly code? That’s about how we felt designing hardware. We don’t currently have good ways to describe what we need, reuse existing designs and compile that description down to a product. We started atopile to fix this. atopile is an open-source language and toolchain to describe circuits with code. The compiler is here:…
2024
7IW
I wrote an OS in 1000 lines of Zig▲151
Sep 2025 · github.com
8XA
X86CSS – An x86 CPU emulator written in CSS▲275
Feb 2026 · lyra.horse
9H1
Homebrew 16bit CPU from 74HC logic with C compiler and Unix-like OS▲192
This is a 16bit CPU+Minicomputer from pure 74 series logic. It has user/kernel modes, virtual memory, prioritized IRQ's and DMA. It has a full C compiler and a unix-like OS. It's still in development.
2023 · sol-1.org
10AM
A minimal C runtime for Linux i386 and x86_64 in 87 SLOC of C▲172
2015 · github.com
11HT
How to write a tiny compiler▲224
2017 · blog.klipse.tech
12L8
Lambda-8cc – An x86 C compiler written in untyped lambda calculus▲249
2022 · github.com
13AA
Anos – a hand-written ~100KiB microkernel for x86-64 and RISC-V▲115
I pretty much always have a kernel project going on, and have been that way for decades. Over the past couple of years, that's been Anos, which has gotten further along than any of my previous hobby kernels, supporting IPC, multitasking, SMP (x86-64 only right now) and running on real hardware. LLMs (mostly Claude Code) have been used during development, but I learned early on that it's not _great_ at code at this level, so I've restricted its use to mostly documentation and tests. There's _a little_ AI code in the user space, but I have a strict "no AI code" rule in the kernel itself. I…
Apr 2026 · github.com
14NR
New RISC-V emulator for Computer Science education▲71
Just released EGG, an emulator created for teaching Assembly and microprocessors (designed to suit the needs of the Microprocessors classes, at Universidade Federal do Paraná, Brazil). The emulator will support multiple architetures in the future, but currently only RISC-V is implemented.
2024 · github.com
15MM
MyraOS – My 32-bit operating system in C and ASM (Hack Club project)▲247
Hi HN, I’m Dvir, a young developer. Last year, I got rejected after a job interview because I lacked some CPU knowledge. After that, I decided to deepen my understanding in the low level world and learn how things work under the hood. I decided to try and create an OS in C and ASM as a way to broaden my knowledge in this area. This took me on the most interesting ride, where I’ve learned about OS theory and low level programming on a whole new level. I’ve spent hours upon hours, blood and tears, reading different OS theory blogs, learning low level concepts, debugging, testing and working on…
Oct 2025 · github.com
16SX
small x86-64 assembler written in V▲11
2023 · github.com
17GI
Going into freshman year, figured I should build an interpreter▲138
Hi all! I'm going into my freshman year, and figured that the best way to prepare for the intro to programming Racket course would be to implement my own garbage-collected, dynamically typed, functional programming language in C ;) Anyways... here's the repo: https://github.com/liam-ilan/crumb I started learning C over the summer, so I still have a whole lot to learn... Any feedback would be greatly appreciated! :D
2023
18II
I integrated my from-scratch TCP/IP stack into the xv6-riscv OS▲147
Hi HN, To truly understand how operating systems and network protocols work, I decided to combine two classic learning tools: the xv6 teaching OS and a from-scratch TCP/IP stack. I'm excited to share the result: my own from-scratch TCP/IP networking stack running directly inside the xv6-riscv (https://github.com/pandax381/xv6-riscv-net) kernel. The project uses a modern virtio-net driver, allowing it to run seamlessly in QEMU and communicate with the host machine. Key features: - From-Scratch Stack: The core is powered by microps…
2025 · github.com
19LC
Learn C and its lower levels interactively, in the browser▲356
I made a simple virtual machine that runs C in the browser.This project is made as an experiment to see if C can be learned easier if the lower level is covered in paralel. Sandbox: https://vasyop.github.io/miniC-hosting Tutorial part 1: https://vasyop.github.io/miniC-hosting/?0 More info: https://github.com/vasyop/miniC-hosting/blob/master/README.md Please support this project: https://github.com/vasyop/miniC-hosting/blob/master/support.md
2019
20IW
I wrote a minimal memory allocator in C▲137
A fun toy memory allocator (not thread safe, that's a future TODO). I also wanted to explain how I approached it, so I also wrote a tutorial blog post (~20 minute read) covering the code which you can find the link to in the README.
Nov 2025 · github.com
21AS
A small virtual machine written in C▲212
2014 · github.com
22
A Project Oberon System version running on RISC-V instead of RISC-5▲121
Modified version of the original from http://www.projectoberon.com/ for use with the Oberon IDE - GitHub - rochus-keller/OberonSystem at op2-rv32
28d ago · github.com
23CI
Comprehensive inter-process communication (IPC) toolkit in modern C++▲88
If you work in C++, and you would like 2+ programs to share data structures (and/or native I/O handles a.k.a. FDs) among each other, there is a good chance Flow-IPC - will make it considerably less annoying to code than typical approaches; and - may massively reduce the latency involved. Those sharing Cap'n Proto-encoded data may have particular interest. Cap'n Proto (https://capnproto.org) is fantastic at its core task - in-place serialization with zero-copy - and we wanted to make the IPC (inter-process communication) involving capnp-serialized messages be zero-copy,…
2024 · github.com
24ER
Emacs-riscv – A RISC-V emulator written in Emacs Lisp▲10
Hi HN, This is a small RISC-V emulator I’ve been hacking on in Emacs Lisp as a fun weekend project. It started mostly as a way to better understand the RISC-V spec by implementing things myself, and also as an excuse to write more non-trivial Emacs Lisp. It currently focuses on RV32I and related basics, and is very much not optimized or production-ready. If you’re into RISC-V, emulators, or just enjoy seeing unusual things built in Emacs Lisp, feedback and comments are welcome Happy hacking!
Jan 2026 · github.com

Ranked by how close each launch is in meaning, then by votes. Refine with a description →