I made a discrete logic network card
Building a 10BASE-T Ethernet transceiver (receiver and transmitter) with discrete logic chips
I made a discrete logic network card launched on April 9, 2024 with 541 votes, #42 of 4,347 launches that month and more than 99% of that year's launches. The site was still online in September 2026, 2 years on.
In plain words
This project is a network card built from discrete logic components rather than integrated circuits. It handles network communication through individual transistors and gates wired together. The creator documents the technical implementation and design choices on their website. It appeals to hobbyists interested in understanding how networking hardware works at a fundamental level and those who enjoy retro computing or custom electronics projects.
written from the facts on this page · September 2026
From the sources
This post is a continuation of my journey to build a complete computer system using discrete logic components. At this point I have made a computer capable of running network applications like an HTTP server or a LAN game. Last year I built a physical level adapter which converts a 10BASE-T Ethernet signal to SPI and back. Back then I used an STM32 microcontroller to test its operation, now I’m implementing a MAC layer module to connect it to my homebrew computer . Both adapters are full-duplex and have independent transmitter and receiver parts. The new module with PHY shield removed. Bodge wires fix swapped SCK and MOSI. Firstly, serial SPI data needs to be converted into a stream…from qdiv.dev
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Explore Digital circuits online with CircuitVerse. With our easy to use simulator interface, you will be building circuits in no time.
We built an 8-bit CPU as 2nd year EE studentsJun 2026 · github.com · ▲108Hi! me and my friends together built an 8 bit CPU implemented in Logisim purely from scratch. The control unit of this system does not implement the generic microcode ROM or any kind of RAM. This was made purely from discrete logic gates and coded the system to run different programs. key features: Custom 16-instruction Harvard ISA, 8-bit fixed format, 4 general purpose registers Hardwired control unit built entirely from AND/OR gate logic matrix Dual-phase clocking to eliminate race conditions Bootstrap Control Unit that cold-boots via ROM-to-RAM transfer Early-exit conditional…
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