Built a VFD clock driven by an ESP32

ESP32-based focus timer with an epaper display and rotary dial - Rukenshia/pomodoro

I made an alarm clock that blows up capacitors to wake you up. There are more details on the Github repo but it's made from an esp32-c3 as the microcontroller, with 3 capacitor slots. There are relays on each capacitor slot to put 15v reverse voltage on the capacitor, with 5.1 ohm resistors on each slot for current limiting in case the capacitor shorts out. I also chucked in an SSD1315 OLED to show the time and a menu to configure it, although there's a web UI as well. The esp32 also means you can fetch the time from NTP. It also functions as a small heater since I used LDOs to step down 15v…

The core question: how did HP's scientific calculators actually work at the gate level? That rabbit hole led to building one from scratch. The architectural decision everything else follows from: a decimal calculator should store numbers as BCD — one decimal digit per 4-bit nibble. A standard byte-oriented CPU (Z80, 6502) fights that layout constantly. So I designed a small custom CPU in Verilog where 4 bits is the natural data width and memory is nibble addressable. What the project covers: - Custom CPU: Harvard architecture, 12-bit ISA, 8-state execution FSM, hardware stack guard with a…

Hi! me and my friends together built an 8 bit CPU implemented in Logisim purely from scratch. The control unit of this system does not implement the generic microcode ROM or any kind of RAM. This was made purely from discrete logic gates and coded the system to run different programs. key features: Custom 16-instruction Harvard ISA, 8-bit fixed format, 4 general purpose registers Hardwired control unit built entirely from AND/OR gate logic matrix Dual-phase clocking to eliminate race conditions Bootstrap Control Unit that cold-boots via ROM-to-RAM transfer Early-exit conditional…

We built CircadianLab, a free in-browser tool for lighting design. It uses webGPU shaders to calculate melanopic equivalent daylight illuminance (mel-EDI, formerly EML, relevant for circadian rhythm and WELL v2 compliance), photopic illuminance, UGR glare per CIE 117, and actual daylight through windows and skylights. It has a database of 400,000+ IES files from 81 lighting manufacturers and supports easy sharing of scenes/configs with other people. Daylight uses the NREL Solar Position Algorithm and a Perez clear / intermediate / overcast sky model, mixed into the same…