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Life & fun · alternatives · 2026

24 alternatives to CoreTrace, a visual 16-bit CPU simulator

I built a 16-bit CPU simulator that runs entirely in the browser. You can write assembly, run it, or step through it one instruction at a time while watching what happens inside the CPU. It shows the registers, memory, flags, ALU, buses, and datapath as the program executes. You can also set breakpoints, inspect execution cycles, replay previous cycles, and try some example programs. I built this because I wanted CPU architecture to feel more tangible. Reading about fetch, decode, registers, buses, and the ALU is one thing. Watching an instruction actually move through the CPU is much more…

Below are 24 products that do a similar job, ranked by how close each is in meaning and then by launch-day votes.

  1. 1

    I built a tiny 8-bit CPU simulator in Python to better understand how computers work at a low level. It visualizes registers, memory, and instructions in real-time, so you can actually see each operation as it happens. You can write simple assembly code and watch how the CPU executes it step by step. The project is mainly for learning and experimentation, but I’d love feedback or ideas for improvement.

    Oct 2025 · github.com · its alternatives →

  2. 2

    I started working on my ideas a few months ago. I've shipped 4 apps so far. I love my numbers, so every morning I'd go through the payments dashboard, analytics, bug reports, feature requests, and everything else for each app. I wished for a single place to view it all, so I built Motherboard. It runs locally in the browser and tracks any visible data point from any website with just a click. A single dashboard for everything. Life's good.

    2025 · trymotherboard.com · its alternatives →

  3. 3
  4. 4

    A digital logic simulation written in C. Contribute to rzscheck/logic development by creating an account on GitHub.

    2020 · github.com · its alternatives →

  5. 5

    Simple CPU model written in 60 lines of C with 8 registers and basic instructions - wkoszek/cpu60

    2015 · github.com · its alternatives →

  6. 6

    I built ChipBuilder to make computer architecture more approachable through interactive puzzles. You start with basic logic gates like AND, OR, and NOT, then gradually combine them into adders, multiplexers, memory, an ALU, and eventually a complete CPU. Once you've built the hardware, you can write assembly programs that run on the processor you created. The game is inspired by courses like Nand2Tetris, but everything runs directly in the browser with a visual circuit editor, simulations, and progressively harder challenges.

    Jul 2026 · select.supply · its alternatives →

  7. 7

    A bit-serial CPU written in VHDL, with a simulator written in C. - howerj/bit-serial

    2020 · github.com · its alternatives →

  8. 8H1

    This is a 16bit CPU+Minicomputer from pure 74 series logic. It has user/kernel modes, virtual memory, prioritized IRQ's and DMA. It has a full C compiler and a unix-like OS. It's still in development.

    2023 · sol-1.org · its alternatives →

  9. 9

    Hey! We are presenting CodeTracer - a user-friendly time-traveling debugger designed to support a wide range of programming languages: https://github.com/metacraft-labs/codetracer?tab=readme-ov-f... CodeTracer records the execution of a program into a sharable self-contained trace file. You can load the produced trace files in a GUI environment that allows you to move forward and backward through the execution and to examine the history of all memory locations. They say a picture is worth a thousand words — well, a video is even better! Watch the demo below to see…

    2025 · github.com · its alternatives →

  10. 10

    Learn how classic game hardware worked. Write code and see it run instantly.

    2016 · 8bitworkshop.com · its alternatives →

  11. 11

    Hi! me and my friends together built an 8 bit CPU implemented in Logisim purely from scratch. The control unit of this system does not implement the generic microcode ROM or any kind of RAM. This was made purely from discrete logic gates and coded the system to run different programs. key features: Custom 16-instruction Harvard ISA, 8-bit fixed format, 4 general purpose registers Hardwired control unit built entirely from AND/OR gate logic matrix Dual-phase clocking to eliminate race conditions Bootstrap Control Unit that cold-boots via ROM-to-RAM transfer Early-exit conditional…

    Jun 2026 · github.com · its alternatives →

  12. 12

    A simple Python debugger and profiler that generates animated visualizations of program flow, useful for algorithm learning. - CCExtractor/vardbg

    2020 · github.com · its alternatives →

  13. 13

    A fun toy memory allocator (not thread safe, that's a future TODO). I also wanted to explain how I approached it, so I also wrote a tutorial blog post (~20 minute read) covering the code which you can find the link to in the README.

    Nov 2025 · github.com · its alternatives →

  14. 14

    allocscope - a memory tracking tool. Contribute to matt-kimball/allocscope development by creating an account on GitHub.

    2023 · github.com · its alternatives →

  15. 15

    The core question: how did HP's scientific calculators actually work at the gate level? That rabbit hole led to building one from scratch. The architectural decision everything else follows from: a decimal calculator should store numbers as BCD — one decimal digit per 4-bit nibble. A standard byte-oriented CPU (Z80, 6502) fights that layout constantly. So I designed a small custom CPU in Verilog where 4 bits is the natural data width and memory is nibble addressable. What the project covers: - Custom CPU: Harvard architecture, 12-bit ISA, 8-state execution FSM, hardware stack guard with a…

    May 2026 · github.com · its alternatives →

  16. 16

    I’ve been experimenting with Rust lately and wanted a project that would help me explore some of its lower-level and performance-oriented features. Inspired by Sebastian Lague’s videos, I decided to implement my own ray tracer from scratch. The initial goal was just to render a simple 3D scene in the browser at a reasonable frame rate. It evolved into a small renderer that can: • Run locally or on the web using wgpu and WebAssembly • Perform mesh rendering with a Bounding Volume Hierarchy (BVH) for acceleration • Simulate both direct and indirect illumination for photorealistic results • Be…

    Nov 2025 · github.com · its alternatives →

  17. 17

    Github: https://github.com/errorcodezero/turbine

    2025 · errorcodezero.dev · its alternatives →

  18. 18AR

    2021 · guillaume.baierouge.fr · its alternatives →

  19. 19GI

    Hi all! I'm going into my freshman year, and figured that the best way to prepare for the intro to programming Racket course would be to implement my own garbage-collected, dynamically typed, functional programming language in C ;) Anyways... here's the repo: https://github.com/liam-ilan/crumb I started learning C over the summer, so I still have a whole lot to learn... Any feedback would be greatly appreciated! :D

    2023 · its alternatives →

  20. 20

    An educational puzzle game. Solve a series of tasks where you build increasingly powerful components. Starts with the simplest logical components and ends up with a programmable computer.

    2018 · nandgame.com · its alternatives →

  21. 21

    The overall idea is to chart out the thousands of Mini PCs by benchmark and reveal the Pareto Front so you can get the most Compute per Dollar. Definitely a labor of love as I have a number of Mini PCs for my "homelab" (TrueNAS, piHole, Plex, basic stuff). It uses Gemini to extract specs from listings (since they're not often strongly categorized). Quick blog post here: https://luke.zip/posts/pareto-pcs/

    Jun 2026 · minipcs.zip · its alternatives →

  22. 22

    Made an ARM Thumb CPU from scratch in a digital circuit simulator for fun and decided to push the joke a little further and run real stuff on it, like a Web server, a Scheme interpreter, a MIDI player, and a VT100 emulator. This is basically a how-did-we-get-here blogpost, it's my second one of this kind, I'd love any feedback you might have.

    2022 · zdimension.fr · its alternatives →

  23. 23

    A cross-language, zero-copy coroutine observability framework based on the cTP shared-memory protocol, utilizing lock-free ring buffers for ultra-low overhead state tracing. - lixiasky-back/coroTracer

    Mar 2026 · github.com · its alternatives →

  24. 24

    I built a new 8-bit CPU in VHDL from scratch (starting from the ISA). I felt that most educational soft-cores hide too much behind abstraction, eg. if I can do a+b with a single assignment that calls an optimized arithmetic library, then why did I learn the ripple carry adder in the first place ? And why did I learn flip flops if I can do all my control logic with a simple PROCESS statement like I would with a programming language ? Of course abstraction is the main selling point of HDLs, but would it work if I tried to keep strictly structural and rely on ieee.std_logic_1164 only ? Well, it…

    Jan 2026 · github.com · its alternatives →

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