Dev tools · alternatives · 2026
24 alternatives to My summer project - simulated CPU built from NAND gates
A simulated CPU built using only NAND gates. Contribute to IsaacLewis/NAND-CPU development by creating an account on GitHub.
My Summer Project is a simulated CPU constructed entirely from NAND gates. It is designed for developers and computer science enthusiasts interested in understanding fundamental digital logic and processor… Below are 24 products that do a similar job, ranked by how close each is in meaning and then by launch-day votes. My summer project - simulated CPU built from NAND gates launched in 2011; newer entries below may have overtaken it.
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I am proud to present my solo hobby project NAND. This year-long undertaking follows the completed Nand to Tetris course, but ported to the web with its own runtime, user interface, and IDE. Using the "Load example program" selector, you can try out some programs I wrote on NAND's emulated hardware such as 2048, a genetic algorithm, and a manual stack overflow to corrupt the screen. Check out NAND at https://nand.arhan.sh Additionally, I've authored an extensive writeup about the project. Read about it on the GitHub repository's readme.
2024 · github.com · its alternatives →
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* OPEN TO CONTRIBUTIONS * NandToTetris is a course which has you build a full computer from: Logic gates -> Chips -> RAM -> CPU -> Computer -> Assembler -> Compiler -> OS -> Tetris All this is done via software defined hardware emulation. I'm building an emulator for this entire stack in C. How is my approach different to other projects that build emulators? - No external dependencies (so far) - Start with a single software defined NAND gate in C - EVERYTHING is built from this base chip - Don't use certain programming utilities: boolean logic operators, bitwise logic operators etc Instead…
2024 · github.com · its alternatives →
- 3
I built ChipBuilder to make computer architecture more approachable through interactive puzzles. You start with basic logic gates like AND, OR, and NOT, then gradually combine them into adders, multiplexers, memory, an ALU, and eventually a complete CPU. Once you've built the hardware, you can write assembly programs that run on the processor you created. The game is inspired by courses like Nand2Tetris, but everything runs directly in the browser with a visual circuit editor, simulations, and progressively harder challenges.
Jul 2026 · select.supply · its alternatives →
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A digital logic simulation written in C. Contribute to rzscheck/logic development by creating an account on GitHub.
2020 · github.com · its alternatives →
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Hi! me and my friends together built an 8 bit CPU implemented in Logisim purely from scratch. The control unit of this system does not implement the generic microcode ROM or any kind of RAM. This was made purely from discrete logic gates and coded the system to run different programs. key features: Custom 16-instruction Harvard ISA, 8-bit fixed format, 4 general purpose registers Hardwired control unit built entirely from AND/OR gate logic matrix Dual-phase clocking to eliminate race conditions Bootstrap Control Unit that cold-boots via ROM-to-RAM transfer Early-exit conditional…
Jun 2026 · github.com · its alternatives →
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I built a tiny 8-bit CPU simulator in Python to better understand how computers work at a low level. It visualizes registers, memory, and instructions in real-time, so you can actually see each operation as it happens. You can write simple assembly code and watch how the CPU executes it step by step. The project is mainly for learning and experimentation, but I’d love feedback or ideas for improvement.
Oct 2025 · github.com · its alternatives →
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The core question: how did HP's scientific calculators actually work at the gate level? That rabbit hole led to building one from scratch. The architectural decision everything else follows from: a decimal calculator should store numbers as BCD — one decimal digit per 4-bit nibble. A standard byte-oriented CPU (Z80, 6502) fights that layout constantly. So I designed a small custom CPU in Verilog where 4 bits is the natural data width and memory is nibble addressable. What the project covers: - Custom CPU: Harvard architecture, 12-bit ISA, 8-state execution FSM, hardware stack guard with a…
May 2026 · github.com · its alternatives →
- 8IM
2022 · imihajlov.tk · its alternatives →
- 9IM
2018 · bitbucket.org · its alternatives →
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An educational puzzle game. Solve a series of tasks where you build increasingly powerful components. Starts with the simplest logical components and ends up with a programmable computer.
2018 · nandgame.com · its alternatives →
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2016 · youtube.com · its alternatives →
- 12IM
Building a 10BASE-T Ethernet transceiver (receiver and transmitter) with discrete logic chips
2024 · qdiv.dev · its alternatives →
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A Flipper Zero clone, but cheapest, DIY and simply Open Source, made with Arduino IDE - lraton/FlopperZiro
2025 · github.com · its alternatives →
- 14H1
This is a 16bit CPU+Minicomputer from pure 74 series logic. It has user/kernel modes, virtual memory, prioritized IRQ's and DMA. It has a full C compiler and a unix-like OS. It's still in development.
2023 · sol-1.org · its alternatives →
- 15
Simple CPU model written in 60 lines of C with 8 registers and basic instructions - wkoszek/cpu60
2015 · github.com · its alternatives →
- 16
This is a little toy project of mine that lets you simulate digital logic graphs. It was inspired by Minecraft's Redstone and the Piet esolang. It's got some serious drawbacks-- you write circuits as PNGs and simulate them with a Python interface. It's slow to run and slow to experiment with. And it is certainly difficult to use for people with any kind of color blindness. But despite that, I hope this can still be a fun toy!
2022 · github.com · its alternatives →
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Hi HN, I turned the freshly published paper “The Constructor Theory of Time” by David Deutsch and Chiara Marletto (arXiv, 13 May 2025) into an executable Python library. What you’ll find • One-to-one translation of the paper’s formalism: Substrates, Attributes, Tasks, Constructors, and task-algebra operators • Possibility / impossibility predicates and counterfactuals encoded exactly as defined • Test suite that mirrors every lemma and example (>95 % coverage, mypy-typed) • Reproductions of key results: time-keeping substrates, irreversibility proofs, quantum branching tasks, and a…
2025 · github.com · its alternatives →
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Inspired by games like Turing Complete/Virtual Circuit Board/Logic World, I tried to make a mix of aseprite and wiredworld/wired-logic, the idea being the user can build a digital circuit using a "fullstack" pixelart creation workflow. The circuit is just an image. The primitives are (i) connected wires which have undefined, 0 or 1 state during simulation (displayed brighter or darker in function of the state) and (ii) NANDs, which are little pixel triangles. During simulation the user can interact with any wire by clicking on it, toggling its state, which is cool for messing…
2024 · github.com · its alternatives →
- 20
A bit-serial CPU written in VHDL, with a simulator written in C. - howerj/bit-serial
2020 · github.com · its alternatives →
- 21AR
2021 · guillaume.baierouge.fr · its alternatives →
- 22
Hi! I've been working on the flipjump project, a programming language with 1 opcode: flip (invert) a bit, then jump (unconditionally). So a bit-flip followed by more bit-flips. It's effectively a bunch of NOT gates. This language, as poor as it sounds, is RICH. Today I completed my compiler from C to FlipJump. It takes C files, and compiles them into flipjump. I finished testing it all today, and it works! My key interest in this project is to stretch what we know of computing and to prove that anything can be done even with minimal power. I appreciate you reading my announcement, and be…
2025 · github.com · its alternatives →
- 23
Made an ARM Thumb CPU from scratch in a digital circuit simulator for fun and decided to push the joke a little further and run real stuff on it, like a Web server, a Scheme interpreter, a MIDI player, and a VT100 emulator. This is basically a how-did-we-get-here blogpost, it's my second one of this kind, I'd love any feedback you might have.
2022 · zdimension.fr · its alternatives →
- 24
H2 Forth CPU▲120A Forth CPU and System on a Chip, based on the J1, written in VHDL - howerj/forth-cpu
2019 · github.com · its alternatives →
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