Life & fun · alternatives · 2026
24 alternatives to Ternary Computer System
Hi everyone! I'm an Italian programmer, very passionate about computer architecture. Some time ago I realized that some architectures potentially much superior to the classic VonNeumann, have been forgotten because there were no reliable technical solutions to implement them. One of these architectures particularly struck me and it is the "Dataflow architecture", in which there is no Program counter, but the instructions are executed in real contemporaneity whenever the operands are available. In trying to find a technical solution that implements this type of architecture effectively…
The Ternary Computer System is an experimental CPU architecture using three logical states instead of traditional binary, designed to implement dataflow computing principles where instructions execute simultaneously… Below are 24 products that do a similar job, ranked by how close each is in meaning and then by launch-day votes. Ternary Computer System launched in 2024; newer entries below may have overtaken it.
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I replicated David Ng's RYS method (https://dnhkng.github.io/posts/rys/) on consumer AMD GPUs (RX 7900 XT + RX 6950 XT) and found something I didn't expect. Transformers appear to have discrete "reasoning circuits" — contiguous blocks of 3-4 layers that act as indivisible cognitive units. Duplicate the right block and the model runs its reasoning pipeline twice. No weights change. No training. The model just thinks longer. The results on standard benchmarks (lm-evaluation-harness, n=50): Devstral-24B, layers 12-14 duplicated once: - BBH Logical Deduction: 0.22 → 0.76…
Mar 2026 · github.com · its alternatives →
- 3
Clears▲376Move beyond AI coding to Agentic Software Delivery
Aug 2026 · clears.ai · its alternatives →
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The core question: how did HP's scientific calculators actually work at the gate level? That rabbit hole led to building one from scratch. The architectural decision everything else follows from: a decimal calculator should store numbers as BCD — one decimal digit per 4-bit nibble. A standard byte-oriented CPU (Z80, 6502) fights that layout constantly. So I designed a small custom CPU in Verilog where 4 bits is the natural data width and memory is nibble addressable. What the project covers: - Custom CPU: Harvard architecture, 12-bit ISA, 8-state execution FSM, hardware stack guard with a…
May 2026 · github.com · its alternatives →
- 5H1
This is a 16bit CPU+Minicomputer from pure 74 series logic. It has user/kernel modes, virtual memory, prioritized IRQ's and DMA. It has a full C compiler and a unix-like OS. It's still in development.
2023 · sol-1.org · its alternatives →
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I think graph is a wrong abstraction for building AI agents. Just look at how incredibly hard it is to make routing using LangGraph - conditional edges are a mess. I built Laminar Flow to solve a common frustration with traditional workflow engines - the rigid need to predefine all node connections. Instead of static DAGs, Flow uses a dynamic task queue system that lets workflows evolve at runtime. Flow is built on 3 core principles: * Concurrent Execution - Tasks run in parallel automatically * Dynamic Scheduling - Tasks can schedule new tasks at runtime * Smart Dependencies - Tasks can…
2024 · github.com · its alternatives →
- 7AR
2021 · guillaume.baierouge.fr · its alternatives →
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Hi! me and my friends together built an 8 bit CPU implemented in Logisim purely from scratch. The control unit of this system does not implement the generic microcode ROM or any kind of RAM. This was made purely from discrete logic gates and coded the system to run different programs. key features: Custom 16-instruction Harvard ISA, 8-bit fixed format, 4 general purpose registers Hardwired control unit built entirely from AND/OR gate logic matrix Dual-phase clocking to eliminate race conditions Bootstrap Control Unit that cold-boots via ROM-to-RAM transfer Early-exit conditional…
Jun 2026 · github.com · its alternatives →
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Hey HN, I wanted to share the new online playground for Salt (https://salt-lang.dev/playground/), a sovereign systems language designed for high-performance, distributed workloads where paying an "abstraction tax" is no longer acceptable. We started building Salt to bridge the gap between the raw power of manual pointer arithmetic and the safety guarantees of modern high-level languages. The architecture relies on an MLIR-based backbone and a Z3-powered "formal shadow," and the design is rooted in three main pillars: Fast Enough: The target is to stay within 20% of C's…
Jul 2026 · salt-lang.dev · its alternatives →
- 11SA
Hi HN! Silk is a project I began working on approximately six months ago without any prior experience or knowledge of compiler design, and it's been a frustrating but fun learning experience. It is very much a work in progress, but I would love to hear feedback of any kind!
2020 · ajaymt.github.io · its alternatives →
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This is a hobby project of mine that I started a few years ago to learn about programming language implementation. It was created 95% without AI, although a few recent commits include code from Gemini CLI. I started out following Crafting Interpreters, but gradually branched off that until I had almost nothing left in common. Tech stack: Rust, Cranelift (JIT compilation), LALRPOP (parser). Original title: "A small programming language where everything is a value" (edited based on comments)
Jan 2026 · github.com · its alternatives →
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Zero-Knowledge Proofs (ZKPs) let an untrusted proved show that computation was executed correctly without revealing the inputs to the verifier. However to prove anything, the computation first has to be expressed as a circuit: a system of polynomial equations (constraints) over a finite field. Circuits are the assembly language of zk and every constraint costs prover (and sometimes verifier) time, so production circuits are aggressively hand-optimized. Over the last months, we have been experimenting with writing formal specifications instead and letting LLMs produce the circuits: as long as…
Jul 2026 · zk.golf · its alternatives →
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A digital logic simulation written in C. Contribute to rzscheck/logic development by creating an account on GitHub.
2020 · github.com · its alternatives →
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See what it’s like to program in a language without null.
2015 · books.thoughtbot.com · its alternatives →
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Hi HN, I built MOL, a domain-specific language for AI pipelines. The main idea: the pipe operator |> automatically generates execution traces — showing timing, types, and data at each step. No logging, no print debugging. Example: let index be doc |> chunk(512) |> embed("model-v1") |> store("kb") This auto-prints a trace table with each step's execution time and output type. Elixir and F# have |> but neither auto-traces. Other features: - 12 built-in domain types (Document, Chunk, Embedding, VectorStore, Thought, Memory, Node) - Guard assertions: `guard answer.confidence > 0.5 : "Too low"` -…
Feb 2026 · github.com · its alternatives →
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I built a new 8-bit CPU in VHDL from scratch (starting from the ISA). I felt that most educational soft-cores hide too much behind abstraction, eg. if I can do a+b with a single assignment that calls an optimized arithmetic library, then why did I learn the ripple carry adder in the first place ? And why did I learn flip flops if I can do all my control logic with a simple PROCESS statement like I would with a programming language ? Of course abstraction is the main selling point of HDLs, but would it work if I tried to keep strictly structural and rely on ieee.std_logic_1164 only ? Well, it…
Jan 2026 · github.com · its alternatives →
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Together with a friend, we were developing a golf application. Our codebase grew rapidly and became split between multiple repositories: the iOS app, Android app, backend, front-end, and extra tooling. Both of us also work in larger scale-ups, and we saw the same problem: understanding large distributed codebases becomes progressively harder. Yay for microservices. It takes time to understand and answer questions like: - What calls this function? - What is the impact of changing this interface? - Is this code actually reachable and used? Not a secret that both of us embrace the leverage AI…
Jul 2026 · github.com · its alternatives →
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Hi HN, I've been exploring various applications of formal methods to ML/interpretability and I've been hoping to get more eyes on the approach. I have been working on a small interpretability project I call Symbolic Circuit Distillation. The goal is to take a tiny neuron-level circuit (like the ones in OpenAI's "Sparse Circuits" work) and automatically recover a concise Python program that implements the same algorithm, along with a bounded formal proof that the two are equivalent on a finite token domain. Roughly, the pipeline is: 1. Start from a pruned circuit graph for a specific…
Jan 2026 · github.com · its alternatives →
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It is based on phase noise, consumes less than 60 LUT4s/FFs and achieves up to 7.99 bits of entropy per byte. Feel free to comment if you have any questions, ideas or thoughts :)
2023 · github.com · its alternatives →
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Course on Metaprogramming. Contribute to namin/metaprogramming development by creating an account on GitHub.
2025 · github.com · its alternatives →
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A minimalist key-value database engine for modern applications - 539hex/zu
2025 · github.com · its alternatives →
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A physical-aware routing codec for Intel Cyclone IV FPGAs. - 14sea/Cyclone_CRAM_Mapper
Apr 2026 · github.com · its alternatives →
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The model uses a 1024-dimensional complex Hilbert space with 32 layers of programmable Mach–Zehnder meshes (Reck architecture) and derives token probabilities directly via the Born rule. Despite using only unitary operations and no attention mechanism, a 1024×32 model achieves coherent TinyStories generation after < 1.8 hours of training on a single consumer GPU. This is Part 1 - the next step is physical implementation with $50 of optics from AliExpress.
Nov 2025 · zenodo.org · its alternatives →
Also compare
- Ternary alternatives
- Duplicate 3 layers in a 24B LLM, logical deduction .22→.76. No training alternatives
- Clears alternatives
- A nibble-oriented CPU in Verilog to build a scientific calculator alternatives
- Homebrew 16bit CPU from 74HC logic with C compiler and Unix-like OS alternatives
- Flow – A dynamic task engine for building AI agents alternatives
Ranked by how close each launch is in meaning, then by votes. Prices were read from each product’s own site when checked and can change. Refine with your own description →